In recent years, the demand for FPGAs has kept growing at a rate that can be termed exponential. Two techniques are currently employed to make FPGAs. A first technique uses structures of the PLA (Programmable Logic Array) type, whereby extensive combinatorial logics can be implemented, but which are disadvantageous in applications of intensive sequential logics due to the limited number of flip-flops allowed. The second technique uses elementary modules, each capable of implementing combinatorial and sequential logics. Such modules are connected together as appropriate to produce the circuitry of interest using a technique much in the same class as gate array designing--whereby the elementary cells typically are connected by a second metallization level during the fabrication process--except that in FPGAs the elementary modules provided are either connected together or isolated from the circuitry or re-configured electrically, rather than during the process.
Currently utilized for the purpose are either switches driven by static RAMs--which have the disadvantage of losing their configurations on the occurrence of a power supply failure--or so-called "anti-fuses", which can only be programmed once and pose all the problems that are typical of fuses, including testing.
As is well known, anti-fuses generally are thin dielectrics adapted to be perforated by a high voltage.
It should be further considered that the application of anti-fuses involves additional, non-standard process steps.
Examples of such techniques are represented by products sold by two manufacturers of FPGAs: XILINX STYLE and ACTEL.
The underlying technical problem of this invention is to provide FPGAs with electrical interconnections between elementary modules which afford improved programmability and reliability over prior solutions.
This technical problem is solved by FPGAs having a structure as previously outlined and defined in the characterizing portions of the appended claims to this specification.